SAT-based ATPG beyond stuck-at fault testing

To cope with the problems of technology scaling, a robust design has become desirable. Self-checking circuits combined with rollback or repair strategies can provide a low cost solution for many applications. However, standard synthesis procedures may violate design constraints or lead to sub-optimal designs. The SAT-based strategies for the verification and synthesis of selfchecking circuits presented in this paper can provide efficient solutions. SAT-basierte Testmustererzeugung, Fehlertoleranz, Selbstprüfende Schaltungen, Synthese/SATbased ATPG, Fault Tolerance, Self-Checking Circuits, Synthesis